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USB3318
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface 13MHz Reference Clock
PRODUCT FEATURES
USB-IF "Hi-Speed" compliant to the Universal Serial Bus Specification Rev 2.0 Interface compliant with the ULPI Specification revision 1.1 as a Single Data Rate (SDR) PHY 1.8V to 3.3V IO Voltage (+/- 10%) SMSC flexPWRTM Technology
-- Low current design ideal for battery powered applications -- "Sleep" mode tri-states all ULPI pins and places the part in a low current state
Data Brief Carkit UART mode for non-USB serial data transfers Industrial Operating Temperature -40C to +85C Packaging Options
-- 24 pin QFN lead-free RoHS compliant package (4 x 4 x 0.90 mm height)
Applications
The USB3318 is targeted for any application where a HiSpeed USB connection is desired and when board space, power, and interface pins must be minimized. The USB3318 is well suited for: Cell Phones PDAs MP3 Players GPS Personal Navigation Scanners External Hard Drives Digital Still and Video Cameras Portable Media Players Entertainment Devices Printers Set Top Boxes Video Record/Playback Systems IP and Video Phones Gaming Consoles POS Terminals
Supports FS pre-amble for FS hubs with a LS device attached (UTMI+ Level 3) Supports HS SOF and LS keep-alive pulse Includes full support for the optional On-The-Go (OTG) protocol detailed in the On-The-Go Supplement Revision 1.0a specification Supports the OTG Host Negotiation Protocol (HNP) and Session Request Protocol (SRP) Allows host to turn VBUS off to conserve battery power in OTG applications Support OTG monitoring of VBUS levels with internal comparators "Wrapper-less" design for optimal timing performance and design ease
-- Low Latency Hi-Speed Receiver (43 Hi-Speed clocks Max) allows use of legacy UTMI Links with a ULPI bridge
Internal 5V cable short-circuit protection of ID, DP and DM lines to VBUS or ground 13MHz Reference Clock operation
-- 0 to 3.6V input drive tolerant -- Able to accept "noisy" clock sources
Internal low jitter PLL for 480MHz Hi-Speed USB operation Internal detection of the value of resistance to ground on the ID pin Integrated battery to 3.3V LDO regulator
-- 2.2uF bypass capacitor -- 100mV dropout voltage
Integrated ESD protection circuits
-- Up to +-15kV without any external devices SMSC USB3318
PRODUCT PREVIEW
Revision 1.3 (11-02-07)
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock
Order Number(s):
USB3318-CP-TR FOR 24 PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (TAPE AND REEL) REEL SIZE IS 4000 PIECES.
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright (c) 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.3 (11-02-07)
2
SMSC USB3318
PRODUCT PREVIEW
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock
General Description
The USB3318 is a highly integrated Hi-Speed USB 2.0 Transceiver (PHY) that supports systems architectures based on a 13MHz reference clock. It is designed to be used in both commercial and industrial temperature applications. The USB3318 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device, or an On-the-Go (OTG) device. In addition to the supporting USB signaling the USB3318 also provides USB UART mode USB3318 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. The industry standard ULPI interface uses a method of in-band signaling and status byte transfers between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte transfers the ULPI interface requires only 12 pins. The USB3318 uses SMSC's "wrapper-less" technology to implement the ULPI interface. This "wrapperless" technology allows the PHY to achieve a low latency transmit and receive time. SMSC's low latency transceiver allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and proven UTMI Link IP can be reused.
REFCLK
CPEN
ESD Protection
VBUS ID
OTG
Low Jitter Integrated PLL
BIAS
RBIAS
DP DM
Hi-Speed USB Transceiver
ULPI Registers and State Machine
Integrated Power Management
RESETB VBAT VDD33 VDD18 VDDIO STP NXT DIR CLKOUT
Carkit
ULPI Interface
DATA[7:0]
Figure 1 USB3318 Block Diagram The USB3318 is designed to run with a 13MHz reference clock. By using a reference clock from the Link the USB3318 is able to remove the cost of a crystal reference from the design. The USB3318 includes a integrated 3.3V LDO regulator to generate its own supply from power applied at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The regulator dropout voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on VBAT drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some parameters may be outside the limits of the USB specifications. If the user would like to provide a 3.3V supply to the USB3318, the VBAT and VDD3.3 pins should be connected together. The USB3318 also includes integrated pull-up resistors that can be used for detecting the attachment of a USB Charger. By sensing the attachment to a USB Charger, a product using the USB3318 can charge its battery at more than the 500mA allowed when charging from a USB Host.
SMSC USB3318
3
Revision 1.3 (11-02-07)
PRODUCT PREVIEW
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock
USB3318 Pin Locations and Descriptions
Package Diagram with Pin Locations
The pinout below is viewed from the top of the package.
RESETB
REFCLK
VDD1.8
RBIAS
STP 20
24
23
22
21
ID VBUS VBAT VDD3.3 DM DP
19
DIR
1 2 3 4 5 6 10 11 12 7 8 9
18 17
NXT VDDIO DATA0 DATA1 DATA2 DATA3
24Pin QFN 4x4mm
16 15 14 13
Figure 2 USB3318 QFN Pinout - Top View
Pin Definitions
The following table details the pin definitions for the figure above.
Table 1 USB3318 Pin Description PIN NAME DIRECTION/ TYPE Input, Analog ID I/O, Analog VBUS
Revision 1.3 (11-02-07) 4
ACTIVE LEVEL N/A
CLKOUT
DATA7
DATA6
DATA5
DATA4
CPEN
DESCRIPTION ID pin of the USB cable. For non-OTG applications this pin can be floated. For an A-Device ID is grounded. For a BDevice ID is floated. VBUS pin of the USB cable. This pin is used for the Vbus comparator inputs and for Vbus pulsing during session request protocol.
SMSC USB3318
1
N/A
2
PRODUCT PREVIEW
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock
Table 1 USB3318 Pin Description (continued) 3 VBAT Power 4 VDD3.3 5 DM 6 DP I/O, Analog I/O, Analog Output, CMOS 7 CPEN 8 DATA[7] 9 DATA[6] 10 DATA[5 11 DATA[4] 12 CLKOUT 13 DATA[3] 14 DATA[2] 15 DATA[1] 16 DATA[0] 17 VDDIO Output, CMOS 18 NXT High I/O, CMOS I/O, CMOS I/O, CMOS I/O, CMOS Output, CMOS I/O, CMOS I/O, CMOS I/O, CMOS I/O, CMOS Power N/A N/A N/A Power N/A Regulator input. The regulator supply can be from 5.5V to 3.1V. 3.3V Regulator Output. A 2.2uF (<1 ohm ESR) bypass capacitor to ground is required for regulator stability. The bypass capacitor should be placed as close as possible to the USB3318. D- pin of the USB cable.
N/A
D+ pin of the USB cable.
High
External 5 volt supply enable. This pin is used to enable the external Vbus power supply. The CPEN pin is low on POR. This pad uses VDD3.3 logic level. ULPI bi-directional data bus. DATA[7] is the MSB.
N/A ULPI bi-directional data bus. N/A ULPI bi-directional data bus. N/A ULPI bi-directional data bus. N/A 60MHz reference clock output. All ULPI signals are driven synchronous to the rising edge of this clock.
N/A ULPI bi-directional data bus. N/A ULPI bi-directional data bus. N/A ULPI bi-directional data bus. N/A ULPI bi-directional data bus. DATA[0] is the LSB. 1.8V to 3.3V ULPI interface supply voltage. This voltage sets the value of VOH for the ULPI interface. The PHY asserts NXT to throttle the data. When the Link is sending data to the PHY, NXT indicates when the current byte has been accepted by the PHY. The Link places the next byte on the data bus in the following clock cycle.
N/A
SMSC USB3318
5
Revision 1.3 (11-02-07)
PRODUCT PREVIEW
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock
Table 1 USB3318 Pin Description (continued) Output, CMOS 19 DIR Input, CMOS 20 STP Power 21 VDD1.8 Input, CMOS, RESETB 23 REFCLK 24 RBIAS Input, CMOS Analog, CMOS Ground FLAG GND N/A N/A N/A High N/A Controls the direction of the data bus. When the PHY has data to transfer to the Link, it drives DIR high to take ownership of the bus. When the PHY has no data to transfer it drives DIR low and monitors the bus for commands from the Link. The Link asserts STP for one clock cycle to stop the data stream currently on the bus. If the Link is sending data to the PHY, STP indicates the last byte of data was on the bus in the previous cycle. External 1.8V Supply input pin. This pad needs to be bypassed with a 0.1uF capacitor to ground, placed as close as possible to the USB3318. When low, the part is suspended with all of the I/O tri-stated. When high the USB3318 will operate as a normal ULPI device. 13MHz Reference Clock input.
22
N/A
Rbias pin. This pin requires an 8.06k (1%) resistor to ground, placed as close as possible to the USB3318. Ground. QFN only: The flag should be connected to the ground plane with a via array under the exposed flag. This is the main ground for the IC.
N/A
Revision 1.3 (11-02-07)
6
SMSC USB3318
PRODUCT PREVIEW
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock
Application Diagram
1.8V Supply 3.1-5.5V Battery / Supply 1.8-3.3V IO Supply
4.7uF
0.1u F
Reference Clock 8.06K RESETB 12 RESETB REFCLK VDD1.8 ULPI Interface
4.7uF
RBIAS
0.1u F
STP 20
24
23
22
21
VDDIO 0.1u F ID VBUS VBAT 1 2 3 4 5 6
19
DIR
18 17
NXT VDDIO DATA0 DATA1 DATA2 DATA3 Note: VDDIO can be connected to the 1.8V supply for 1.8V IO
USB Connector
2.2u F
VDD3.3 DM DP
24Pin QFN 4 x 4 mm
16 15 14 13
10
11 DATA4
(msb) DATA7
CPEN
DATA6
DATA5
5 Volt Supply
Host/OTG Only CVBUS Host Device OTG Device Min 120uF 1uF 1uF 10uF 6.5uF Max
CLKOUT REFCLK and CLKOUT should be isolated with a ground line on both sides.
CVBUS
QFN Ground Flag
Figure 3 USB3318 QFN Application Diagram
SMSC USB3318
7
12
7
8
9
Revision 1.3 (11-02-07)
PRODUCT PREVIEW
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock
Package Outline
SMSC USB3318
Figure 4 24-pin QFN, 4x4mm Body, 0.5mm Pitch
8 Revision 1.3 (11-02-07)
PRODUCT PREVIEW

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